MC68HC11PH8 Datasheet, PDF (63/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

PH8.DS03/Modes+mem
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[DS97 v 4.1] 08/Apr/97@13:55
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3.3.2.4 OPTION — System configuration options register 1
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
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System conÞg. options 1 (OPTION) $0039 ADPU CSEL IRQE DLY CME FCME CR1 CR0 0001 0000
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The 8-bit special-purpose OPTION register sets internal system configuration options during
initialization. The time protected control bits IRQE, DLY, FCME and CR[1:0] can be written only
once in the first 64 cycles after a reset and then they become read-only bits. This minimizes the
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possibility of any accidental changes to the system configuration. They may be written at any time
in special modes.
ADPU — A/D power-up (refer to Section 9)
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1 (set) – A/D system power enabled.
0 (clear) – A/D system disabled, to reduce supply current.
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After enabling the A/D power, at least 100µs should be allowed for system stabilization.
CSEL — Clock select (refer to Section 9)
7
1 (set) – A/D, EPROM and EEPROM use internal RC clock source (about
1.5 MHz).
0 (clear) – A/D, EPROM and EEPROM use system E clock
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(must be at least 1MHz).
This bit selects the clock source for the on-chip EPROM, EEPROM and A/D charge pumps. The
on-chip RC clock should be used when the E clock frequency falls below 1MHz.
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IRQE — Configure IRQ for falling edge sensitive operation
1 (set) – Falling edge sensitive operation.
0 (clear) – Low level sensitive operation.
DLY — Enable oscillator start-up delay
1 (set) – A stabilization delay is imposed as the MCU is started up from STOP
mode (or from power-on reset).
0 (clear) –
The oscillator start-up delay is bypassed and the MCU resumes
processing within about four bus cycles. A stable external oscillator
is required if this option is selected.
DLY is set on reset, so a delay is always imposed as the MCU is started up from power-on reset.
A mask option on the MC68HC11PH8 allows the selection of either a short or long delay time for
power-on reset and exit from STOP mode; either 128 or 4064 bus cycles. This option is not
available on the MC68HC711PH8 where the delay time is 4064 bus cycles.
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MC68HC11PH8
OPERATING MODES AND ON-CHIP MEMORY
¬^TPG
MOTOROLA
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