MC68HC11PH8 Datasheet, PDF (117/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

6.5
MI BUS clock rate
The MI BUS clock rate is set via the SCI baud registers. To use the MI BUS, the ST4XCK clock
frequency that drives the SCI clock generator must be selected to match the minimum resolution
of the MI BUS logic. This is expressed by the following formula:
ST4XCK = 16 • 2n • (2 • Push_field_bit_rate) = 16 • 2n • 40kHz = n • 1280kHz
where ‘n’ is an integer and 20kHz is the minimum Push field bit rate for the MI BUS. Values for
ST4XCK could be 1280kHz, 2560kHz, …, n • 1280kHz. The value ‘n’ is the modulus for the
MI BUS baud register (see Section 6.6.2). ST4XCK may be the output of the PLL circuit or it may
be the EXTAL input of the MCU. Refer to Section 2.5.
6.6
SCI2/MI BUS registers
6
MI BUS operation is controlled by the same group of registers as is used for the SCI. However the
functions of some of the bits are modified when in MI BUS mode. A description of the registers,
as applicable to the MI BUS function, is given here.
Note:
In MI BUS mode, bits that have no meaning are reserved by Motorola, and are not
described.
MC68HC11PH8
MOTOROLA INTERCONNECT BUS (MI BUS)
TPG
MOTOROLA
6-7