MC68HC11PH8 Datasheet, PDF (120/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

PT2 — MI BUS TX polarity (See Section 5.6.2)
1 (set) – MI BUS transmit pin will send inverted data.
0 (clear) – MI BUS transmit pin functions normally.
This control bit allows for different driver interfaces between the MCU and the MI BUS wire.
6.6.4 S2CR2 — MI BUS control register 2
SCI2/MI control 2 (S2CR2)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0053 Ñ Ñ RIE2 Ñ TE2 RE2 Ñ SBK2 0000 0000
RIE2 — Receiver interrupt enable 2
6
1 (set) – MI BUS interrupt requested when RDRF2 flag is set.
0 (clear) – RDRF2 and OR2 interrupts disabled.
TE2 — Transmitter enable 2
1 (set) – Transmitter enabled and port pin dedicated to the MI BUS.
0 (clear) – Transmitter disabled.
RE2 — Receiver enable 2
1 (set) – Port pin dedicated to the MI BUS; the receiver is enabled by a pull
sync and is inhibited during a push field.
0 (clear) – Receiver disabled.
SBK2 — Send break 2
1 (set) – MI transmit line is set low for 20 time slots.
0 (clear) – No action.
When an MI BUS wire is held low for eight or more time slots an internal circuit on any slave device
connected to the bus may reset or preset the device with default values.
MOTOROLA
6-10
MOTOROLA INTERCONNECT BUS (MI BUS)
TPG
MC68HC11PH8