MC68HC11PH8 Datasheet, PDF (51/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

PH8.DS03/Modes+mem
—this line does not form part of the document—
[DS97 v 4.1] 08/Apr/97@13:55
1
1) During the software-based STOP mode, MCU clocks are stopped, but the
MCU continues to draw power from V_DD. Power supply current is directly
related to operating frequency in CMOS integrated circuits and there is very
2
little leakage when the clocks are stopped. These two factors reduce power
consumption while the MCU is in STOP mode.
2) To reduce power consumption to a minimum, V_DD can be turned off, and the
3
MODB/VSTBY pin can be used to supply RAM power from either a battery
back-up or a second power supply. Although this method requires external
hardware, it is very effective. Refer to Section 2 for information about how to
connect the stand-by RAM power supply and to Section 10 for a description
4
of low power operation.
3.2.1.2 ROM and EPROM
5
The MCU has 48K bytes of ROM/EPROM. The ROM/EPROM array is enabled when the ROMON
bit in the CONFIG register is set to one (erased). The ROMAD bit in CONFIG places the
ROM/EPROM at either $4000–$FFFF (ROMAD = 1) or at $0000–$BFFF (ROMAD = 0) when
coming out of reset in expanded mode.
3.2.1.3 Bootloader ROM
The bootloader ROM is enabled at address $BE40–$BFFF during special bootstrap mode. The
reset vector is fetched from this ROM and the MCU executes the bootloader firmware. In normal
modes, the bootloader ROM is disabled.
3.2.2 Registers
In Table 3-2, a summary of registers and control bits, the registers are shown in ascending order
within the 128-byte register block. The addresses shown are for default block mapping
($0000–$007F), however, the INIT register remaps the block to any 4K page ($x000–$x07F). See
Section 3.3.2.2.
6
7
8
9
10
11
12
13
14
MC68HC11PH8
OPERATING MODES AND ON-CHIP MEMORY
¬^TPG
MOTOROLA
3-5
15