MC68HC11PH8 Datasheet, PDF (222/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

Table 11-2 Instruction set (Sheet 4 of 6)
11
Mnemonic
LDAB (opr)
Operation
Load accumulator B
LDD (opr)
Load double accumulator D
LDS (opr)
Load stack pointer
LDX (opr)
Load index register X
LDY (opr)
Load index register Y
LSL (opr)
Logical shift left
LSLA
LSLB
LSLD
LSR (opr)
Logical shift left A
Logical shift Left B
Logical shift left D
Logical shift right
LSRA
LSRB
LSRD
Logical shift right A
Logical shift right B
Logical shift right D
MUL
NEG (opr)
Multiply, 8 x 8
Twos complement memory byte
NEGA
NEGB
NOP
ORAA
Twos complement A
Twos complement B
No operation
OR accumulator A (inclusive)
ORAB
OR accumulator B (inclusive)
PSHA
PSHB
PSHX
PSHY
Push A onto stack
Push B onto stack
Push IX onto stack (low Þrst)
Push IY onto stack (low Þrst)
Description
M⇒B
M ⇒ A; M+1 ⇒ B
M:M+1 ⇒ SP
M:M+1 ⇒ IX
M:M+1 ⇒ IY
C
b7
C
b15
0
b0
0
b0
0
b7
C
b0
0
b15
C
b0
A*B⇒D
0ÐM⇒M
0ÐA⇒A
0ÐB⇒B
no operation
A+M⇒A
B+M⇒B
A ⇒ Stack; SP = SPÐ1
B ⇒ Stack; SP = SPÐ1
IX ⇒ Stack; SP = SPÐ2
IY ⇒ Stack; SP = SPÐ2
Addressing
mode
B IMM
B DIR
B EXT
B IND, X
B IND, Y
IMM
DIR
EXT
IND, X
IND, Y
IMM
DIR
EXT
IND, X
IND, Y
IMM
DIR
EXT
IND, X
IND, Y
IMM
DIR
EXT
IND, X
IND, Y
EXT
IND, X
IND, Y
A INH
B INH
INH
EXT
IND, X
IND, Y
A INH
B INH
INH
INH
EXT
IND, X
IND, Y
A INH
B INH
INH
A IMM
A DIR
A EXT
A IND, X
A IND, Y
B IMM
B DIR
B EXT
B IND, X
B IND, Y
A INH
B INH
INH
INH
Opcode
C6
D6
F6
E6
18 E6
CC
DC
FC
EC
18 EC
8E
9E
BE
AE
18 AE
CE
DE
FE
EE
CD EE
18 CE
18 DE
18 FE
1A EE
18 EE
78
68
18 68
48
58
05
Instruction
Operand
ii
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
hh ll
ff
ff
Ñ
Ñ
Ñ
Cycles
2
3
4
4
5
3
4
5
5
6
3
4
5
5
6
3
4
5
5
6
4
5
6
6
6
6
6
7
2
2
3
Condition codes
SXH I NZVC
ÑÑÑÑ∆ ∆ 0 Ñ
ÑÑÑÑ∆ ∆ 0 Ñ
ÑÑÑÑ∆ ∆ 0 Ñ
ÑÑÑÑ∆ ∆ 0 Ñ
ÑÑÑÑ∆ ∆ 0 Ñ
ÑÑÑÑ∆ ∆ ∆ ∆
ÑÑÑÑ∆ ∆ ∆ ∆
ÑÑÑÑ∆ ∆ ∆ ∆
ÑÑÑÑ∆ ∆ ∆ ∆
74
64
18 64
44
54
04
hh ll
ff
ff
Ñ
Ñ
Ñ
6
ÑÑÑÑ 0 ∆ ∆ ∆
6
7
2
ÑÑÑÑ 0 ∆ ∆ ∆
2
ÑÑÑÑ 0 ∆ ∆ ∆
3
ÑÑÑÑ 0 ∆ ∆ ∆
3D
70
60
18 60
40
50
01
8A
9A
BA
AA
18 AA
CA
DA
FA
EA
18 EA
36
37
3C
18 3C
Ñ
hh ll
ff
ff
Ñ
Ñ
Ñ
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
Ñ
Ñ
Ñ
Ñ
10 Ñ Ñ Ñ Ñ Ñ Ñ Ñ ∆
6
ÑÑÑÑ∆ ∆ ∆ ∆
6
7
2
ÑÑÑÑ∆ ∆ ∆ ∆
2
ÑÑÑÑ∆ ∆ ∆ ∆
2 ÑÑÑÑÑÑÑÑ
2
ÑÑÑÑ∆ ∆ 0 Ñ
3
4
4
5
2
ÑÑÑÑ∆ ∆ 0 Ñ
3
4
4
5
3 ÑÑÑÑÑÑÑÑ
3 ÑÑÑÑÑÑÑÑ
4 ÑÑÑÑÑÑÑÑ
5 ÑÑÑÑÑÑÑÑ
MOTOROLA
11-12
CPU CORE AND INSTRUCTION SET
TPG
MC68HC11PH8