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MC68HC11PH8 Datasheet, PDF (137/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit | |||
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8.1.1 Timer enable control
The 16-bit timer may be enabled or disabled under control of the T16EN bit in the PLL control
register.
8.1.1.1 PLLCR â PLL control register
PLL control (PLLCR)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$002E PLLON BCS AUTO BWC VCOT MCS T16EN WEN 1010 1010
PLLON â PLL on (See Section 2.5.4.1)
1 (set) â Switch PLL on.
0 (clear) â Switch PLL off.
BCS â Bus clock select (See Section 2.5.4.1)
1 (set) â VCOOUT output drives the clock circuit (4XCLK).
0 (clear) â EXTALi drives the clock circuit (4XCLK).
AUTO â Automatic bandwidth control (See Section 2.5.4.1)
8
1 (set) â Automatic bandwidth control selected.
0 (clear) â Manual bandwidth control selected.
BWC â Bandwidth control (See Section 2.5.4.1)
1 (set) â High bandwidth control selected.
0 (clear) â Low bandwidth control selected.
VCOT â VCO test (Test mode only, see Section 2.5.4.1)
1 (set) â Loop ï¬lter operates as speciï¬ed by AUTO and BWC.
0 (clear) â Low bandwidth mode of the PLL ï¬lter is disabled.
MCS â Module clock select (See Section 2.5.4.1)
1 (set) â 4XCLK is the source for the SCI and timer divider chain.
0 (clear) â EXTALi is the source for the SCI and timer divider chain.
MC68HC11PH8
TIMING SYSTEM
TPG
MOTOROLA
8-3
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