MC68HC11PH8 Datasheet, PDF (47/264 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

PH8.DS03/Modes+mem
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OPERATING MODES AND ON-CHIP MEMORY ₄
This section contains information about the modes that define MC68HC11PH8 operating conditions,
and about the on-chip memory that allows the MCU to be configured for various applications.
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3.1
Operating modes
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The values of the mode select inputs MODB and MODA during reset determine the operating
mode (See Table 3-4). Single chip and expanded modes are the normal modes. In single chip
mode only on-board memory is available. Expanded mode, however, allows access to external
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memory. Each of these two normal modes is paired with a special mode. Bootstrap, a variation of
the single chip mode, is a special mode that executes a bootloader program in an internal
bootstrap ROM. Test is a special mode that allows privileged access to internal resources.
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3.1.1 Single chip operating mode
In single chip operating mode, the MC68HC11PH8 microcontroller has no external address or
data bus. Ports B, C, F, and the R/W pin are available for general purpose parallel I/O.
3.1.2 Expanded operating mode
In expanded operating mode, the MCU can access a 64K byte physical address space. The
address space includes the same on-chip memory addresses used for single chip mode, in
addition to external memory and peripheral devices.
The expansion bus is made up of ports B, C, and F, and the R/W signal. In expanded mode, high
order address bits are output on the port B pins, low order address bits on the port F pins, and the
data bus on port C. The R/W/PG7 pin signals the direction of data transfer on the port C bus.
When internal resources are accessed in expanded mode, the last external address can be held on
the output pins (A[15:0]) in order to reduce radio-frequency interference (RFI) emissions. This function
is controlled by the FREEZ bit in the CONFIG register. See Section 3.3.2.1 for a description of this bit.
To allow access to slow peripherals, off chip accesses can be extended by one E clock cycle, under
control of the STRCH and STRX bits (in the OPT2 and INIT2 registers respectively). The E clock
MC68HC11PH8
OPERATING MODES AND ON-CHIP MEMORY
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MOTOROLA
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