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MC9S12C128V1 Datasheet, PDF (627/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual
Chapter 21 128 Kbyte Flash Module (S12FTS128K1V1)
Table 21-14. FCMD Field Descriptions
Field
Description
6, 5, 2, 0
CMDB[6:5]
CMDB[2]
CMDB[0]
Valid Flash commands are shown in Table 21-15. An attempt to execute any command other than those listed in
Table 21-15 will set the ACCERR bit in the FSTAT register (see Section 21.3.2.6).
Table 21-15. Valid Flash Command List
CMDB
0x05
0x20
0x40
0x41
NVM Command
Erase verify
Word program
Sector erase
Mass erase
21.3.2.8 RESERVED2
This register is reserved for factory testing and is not accessible to the user.
Module Base + 0x0007
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 21-12. RESERVED2
All bits read 0 and are not writable.
21.3.2.9 Flash Address Register (FADDR)
FADDRHI and FADDRLO are the Flash address registers.
\
Module Base + 0x0008
7
6
5
4
3
2
1
0
R
FABHI
W
Reset
0
0
0
0
0
0
0
0
Figure 21-13. Flash Address High Register (FADDRHI)
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MC9S12C-Family / MC9S12GC-Family
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