MC9S12C128V1 Datasheet, PDF (205/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

Chapter 7 Debug Module (DBGV1) Block Description
Field
15:0
Table 7-12. DBGCC Field Descriptions
Description
Comparator C Compare Bits — The comparator C compare bits control whether comparator C will compare
the address bus bits [15:0] to a logic 1 or logic 0. See Table 7-13.
0 Compare corresponding address bit to a logic 0
1 Compare corresponding address bit to a logic 1
Note: This register will be cleared automatically when the DBG module is armed in LOOP1 mode.
PAGSEL
x0
x1
Table 7-13. Comparator C Compares
EXTCMP Compare
No compare
EXTCMP[5:0] = XAB[21:16]
High-Byte Compare
DBGCCH[7:0] = AB[15:8]
DBGCCH[7:0] = XAB[15:14],AB[13:8]
7.3.2.7 Debug Control Register 2 (DBGC2)
Module Base + 0x0028
Starting address location affected by INITRG register setting.
7
R
BKABEN⁽¹⁾
W
6
FULL
5
BDM
4
TAGAB
3
BKCEN⁽²⁾
2
TAGC²
1
RWCEN²
0
RWC²
Reset
0
0
0
0
0
0
0
0
1. When BKABEN is set (BKP mode), all bits in DBGC2 are available. When BKABEN is cleared and DBG is used in DBG mode,
bits FULL and TAGAB have no meaning.
2. These bits can be used in BKP mode and DBG mode (when capture mode is not set in LOOP1) to provide a third breakpoint.
Figure 7-13. Debug Control Register 2 (DBGC2)
Table 7-14. DBGC2 Field Descriptions
Field
Description
7
BKABEN
6
FULL
5
BDM
Breakpoint Using Comparator A and B Enable — This bit enables the breakpoint capability using comparator
A and B, when set (BKP mode) the DBGEN bit in DBGC1 cannot be set.
0 Breakpoint module off
1 Breakpoint module on
Full Breakpoint Mode Enable — This bit controls whether the breakpoint module is in dual mode or full mode.
In full mode, comparator A is used to match address and comparator B is used to match data. See
Section 7.4.1.2, “Full Breakpoint Mode,” for more details.
0 Dual address mode enabled
1 Full breakpoint mode enabled
Background Debug Mode Enable — This bit determines if the breakpoint causes the system to enter
background debug mode (BDM) or initiate a software interrupt (SWI).
0 Go to software interrupt on a break request
1 Go to BDM on a break request
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MC9S12C-Family / MC9S12GC-Family
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