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MC9S12C128V1 Datasheet, PDF (114/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual
Chapter 3 Module Mapping Control (MMCV4) Block Description
3.3.2.2 Initialization of Internal Registers Position Register (INITRG)
Module Base + 0x0011
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
REG14
REG13
REG12
REG11
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-4. Initialization of Internal Registers Position Register (INITRG)
Read: Anytime
Write: Once in normal and emulation modes and anytime in special modes
This register initializes the position of the internal registers within the on-chip system memory map. The
registers occupy either a 1K byte or 2K byte space and can be mapped to any 2K byte space within the first
32K bytes of the system’s address space.
Table 3-3. INITRG Field Descriptions
Field
Description
6:3
Internal Register Map Position — These four bits in combination with the leading zero supplied by bit 7 of
REG[14:11] INITRG determine the upper five bits of the base address for the system’s internal registers (i.e., the minimum
base address is 0x0000 and the maximum is 0x7FFF).
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MC9S12C-Family / MC9S12GC-Family
Freescale Semiconductor
Rev 01.24