MC9S12C128V1 Datasheet, PDF (238/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
8.3.2.7 ATD Status Register 0 (ATDSTAT0)
This read-only register contains the sequence complete flag, overrun flags for external trigger and FIFO
mode, and the conversion counter.
Module Base + 0x0006
7
R
SCF
W
6
5
4
3
0
0
ETORF
FIFOR
2
CC2
1
CC1
0
CC0
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 8-9. ATD Status Register 0 (ATDSTAT0)
Read: Anytime
Write: Anytime (no effect on (CC2, CC1, CC0))
Table 8-13. ATDSTAT0 Field Descriptions
Field
7
SCF
5
ETORF
Description
Sequence Complete Flag — This flag is set upon completion of a conversion sequence. If conversion
sequences are continuously performed (SCAN = 1), the flag is set after each one is completed. This flag is
cleared when one of the following occurs:
A) Write “1” to SCF
B) Write to ATDCTL5 (a new conversion sequence is started)
C) If AFFC=1 and read of a result register
0 Conversion sequence not completed
1 Conversion sequence has completed
External Trigger Overrun Flag — While in edge trigger mode (ETRIGLE = 0), if additional active edges are
detected while a conversion sequence is in process the overrun flag is set. This flag is cleared when one of the
following occurs:
A) Write “1” to ETORF
B) Write to ATDCTL2, ATDCTL3 or ATDCTL4 (a conversion sequence is aborted)
C) Write to ATDCTL5 (a new conversion sequence is started)
0 No External trigger over run error has occurred
1 External trigger over run error has occurred
238
MC9S12C-Family / MC9S12GC-Family
Freescale Semiconductor
Rev 01.24