MC9S12C128V1 Datasheet, PDF (442/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

Chapter 15 Timer Module (TIM16B8CV1) Block Description
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x000D
R
0
0
0
TSCR2
TOI
W
TCRE
PR2
PR1
PR0
0x000E
TFLG1
R
C7F
C6F
C5F
C4F
C3F
C2F
C1F
C0F
W
0x000F
R
0
0
0
0
0
0
0
TFLG2
TOF
W
R
Bit 15
0x0010–0x001F ^W
TCxH–TCxL
R
Bit 7
W
Bit 14
Bit 6
Bit 13
Bit 5
Bit 12
Bit 4
Bit 11
Bit 3
Bit 10
Bit 2
Bit 9
Bit 1
Bit 8
Bit 0
0x0020
PACTL
R
0
W
PAEN PAMOD PEDGE CLK1
CLK0
PAOVI
PAI
0x0021
R
0
0
0
0
0
0
PAFLG
W
PAOVF
PAIF
0x0022
PACNTH
R
PACNT15 PACNT14 PACNT13 PACNT12 PACNT11 PACNT10 PACNT9 PACNT8
W
0x0023
PACNTL
R
PACNT7 PACNT6 PACNT5 PACNT4 PACNT3 PACNT2 PACNT1 PACNT0
W
0x0024–0x002F R
Reserved
W
= Unimplemented or Reserved
Figure 15-5. TIM16B8CV1 Register Summary (continued)
15.3.2.1 Timer Input Capture/Output Compare Select (TIOS)
Module Base + 0x0000
R
W
Reset
7
IOS7
0
6
IOS6
5
IOS5
4
IOS4
3
IOS3
2
IOS2
1
IOS1
0
0
0
0
0
0
Figure 15-6. Timer Input Capture/Output Compare Select (TIOS)
Read: Anytime
0
IOS0
0
442
MC9S12C-Family / MC9S12GC-Family
Freescale Semiconductor
Rev 01.24