MC9S12C128V1 Datasheet, PDF (229/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
Address
0x001C
0x001D
0x001E
0x001F
Name
ATDDR6H
ATDDR6L
ATDDR7H
ATDDR7L
Bit 7
R
0
0
W
R BIT 7
BIT 7 MSB
W
R
0
0
W
R BIT 7
BIT 7 MSB
W
6
0
0
BIT 6
BIT 6
0
0
BIT 6
BIT 6
5
0
0
BIT 5
BIT 5
0
0
BIT 5
BIT 5
4
0
0
BIT 4
BIT 4
0
0
BIT 4
BIT 4
3
0
0
BIT 3
BIT 3
0
0
BIT 3
BIT 3
2
0
0
BIT 2
BIT 2
0
0
BIT 2
BIT 2
= Unimplemented or Reserved
Figure 8-2. ATD Register Summary (Sheet 4 of 4)
1
BIT 9 MSB
0
BIT 1
BIT 1
BIT 9 MSB
0
BIT 1
BIT 1
Bit 0
BIT 8
0
BIT 0
BIT 0
BIT 8
0
BIT 0
BIT 0
NOTE
Register Address = Module Base Address + Address Offset, where the
Module Base Address is defined at the MCU level and the Address Offset is
defined at the module level.
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
229
Rev 01.24