MC9S12C128V1 Datasheet, PDF (405/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
Figure 13-18 shows a burst of noise near the beginning of the start bit that resets the RT clock. The sample
after the reset is low but is not preceded by three high samples that would qualify as a falling edge.
Depending on the timing of the start bit search and on the data, the frame may be missed entirely or it may
set the framing error flag.
Rx Input Signal
START BIT
LSB
NO START BIT FOUND
SAMPLES 1 1 1 1 1 1 1 1 1 0
0
1
100000000
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
Figure 13-18. Start Bit Search Example 5
In Figure 13-19, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
START BIT
LSB
Rx Input Signal
SAMPLES 1 1 1 1 1 1 1 1 1 0
0
0
0101
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
Figure 13-19. Start Bit Search Example 6
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