MC9S12C128V1 Datasheet, PDF(171/690 Page) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

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MC9S12C128V1 Datasheet, PDF (171/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

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Chapter 6 Background Debug Module (BDMV4) Block Description

Table 6-2. BDMSTS Field Descriptions

Field

Description

7

ENBDM

6

BDMACT

5

ENTAG

4

SDV

3

TRACE

Enable BDM â This bit controls whether the BDM is enabled or disabled. When enabled, BDM can be made

active to allow ï¬rmware commands to be executed. When disabled, BDM cannot be made active but BDM

hardware commands are allowed.

0 BDM disabled

1 BDM enabled

Note: ENBDM is set by the ï¬rmware immediately out of reset in special single-chip mode. In secure mode, this

bit will not be set by the ï¬rmware until after the EEPROM and FLASH erase verify tests are complete.

BDM Active Status â This bit becomes set upon entering BDM. The standard BDM ï¬rmware lookup table is

then enabled and put into the memory map. BDMACT is cleared by a carefully timed store instruction in the

standard BDM ï¬rmware as part of the exit sequence to return to user code and remove the BDM memory from

the map.

0 BDM not active

1 BDM active

Tagging Enable â This bit indicates whether instruction tagging in enabled or disabled. It is set when the

TAGGO command is executed and cleared when BDM is entered. The serial system is disabled and the tag

function enabled 16 cycles after this bit is written. BDM cannot process serial commands while tagging is active.

0 Tagging not enabled or BDM active

1 Tagging enabled

Shift Data Valid â This bit is set and cleared by the BDM hardware. It is set after data has been transmitted as

part of a ï¬rmware read command or after data has been received as part of a ï¬rmware write command. It is

cleared when the next BDM command has been received or BDM is exited. SDV is used by the standard BDM

ï¬rmware to control program ï¬ow execution.

0 Data phase of command not complete

1 Data phase of command is complete

TRACE1 BDM Firmware Command is Being Executed â This bit gets set when a BDM TRACE1 ï¬rmware

command is ï¬rst recognized. It will stay set as long as continuous back-to-back TRACE1 commands are

executed. This bit will get cleared when the next command that is not a TRACE1 command is recognized.

0 TRACE1 command is not being executed

1 TRACE1 command is being executed

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MC9S12C-Family / MC9S12GC-Family

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Rev 01.24

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