MC9S12C128V1 Datasheet, PDF (435/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

Chapter 15
Timer Module (TIM16B8CV1) Block Description
Table 15-1. Revision History
Version
Number
01.03
01.04
01.05
Revision Dates
06 Feb 2006
Effective
Date
06 Feb 2006
08 July 2008 08 July 2008
05 May 2010 05 May 2010
Author
Description of Changes
S. Chinnam
S. Chinnam
Ame Wang
Corrected the type at 0x006 and later in the document
from TSCR2 and TSCR1
Revised flag clearing procedure, whereby TEN bit must be
set when clearing flags.
-in 15.3.2.8/15-446,add Table 15-11
-in 15.3.2.11/15-450,TCRE bit description part,add Note
-in 15.4.3/15-459,add Figure 15-29
15.1 Introduction
The basic timer consists of a 16-bit, software-programmable counter driven by a seven-stage
programmable prescaler.
This timer can be used for many purposes, including input waveform measurements while simultaneously
generating an output waveform. Pulse widths can vary from microseconds to many seconds.
This timer contains 8 complete input capture/output compare channels and one pulse accumulator. The
input capture function is used to detect a selected transition edge and record the time. The output compare
function is used for generating output signals or for timer software delays. The 16-bit pulse accumulator
is used to operate as a simple event counter or a gated time accumulator. The pulse accumulator shares
timer channel 7 when in event mode.
A full access for the counter registers or the input capture/output compare registers should take place in
one clock cycle. Accessing high byte and low byte separately for all of these registers may not yield the
same result as accessing them in one word.
15.1.1 Features
The TIM16B8CV1 includes these distinctive features:
• Eight input capture/output compare channels.
• Clock prescaling.
• 16-bit counter.
• 16-bit pulse accumulator.
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
435
Rev 01.24