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MC9S12C128V1 Datasheet, PDF (552/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual | |||
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Chapter 19 64 Kbyte Flash Module (S12FTS64KV4)
Table 19-13. Flash Protection Scenario Transitions
From
To Protection Scenario(1)
Protection
Scenario
0
1
2
3
4
5
6
7
6
X
X
X
X
7
X
X
X
X
X
X
X
X
1. Allowed transitions marked with X.
19.3.2.6 Flash Status Register (FSTAT)
The FSTAT register deï¬nes the status of the Flash command controller and the results of command
execution.
Module Base + 0x0005
R
W
Reset
7
CBEIF
1
6
5
4
3
CCIF
0
PVIOL
ACCERR
2
BLANK
1
0
0
0
0
= Unimplemented or Reserved
Figure 19-12. Flash Status Register (FSTAT)
1
FAIL
0
0
DONE
1
In normal modes, bits CBEIF, PVIOL, and ACCERR are readable and writable, bits CCIF and BLANK
are readable and not writable, remaining bits, including FAIL and DONE, read 0 and are not writable. In
special modes, FAIL is readable and writable while DONE is readable but not writable. FAIL must be clear
in special modes when starting a command write sequence.
Table 19-14. FSTAT Field Descriptions
Field
7
CBEIF
6
CCIF
Description
Command Buffer Empty Interrupt Flag â The CBEIF ï¬ag indicates that the address, data and command
buffers are empty so that a new command write sequence can be started. The CBEIF ï¬ag is cleared by writing
a 1 to CBEIF. Writing a 0 to the CBEIF ï¬ag has no effect on CBEIF. Writing a 0 to CBEIF after writing an aligned
word to the Flash address space but before CBEIF is cleared will abort a command write sequence and cause
the ACCERR ï¬ag in the FSTAT register to be set. Writing a 0 to CBEIF outside of a command write sequence
will not set the ACCERR ï¬ag. The CBEIF ï¬ag is used together with the CBEIE bit in the FCNFG register to
generate an interrupt request (see Figure 19-29).
0 Buffers are full
1 Buffers are ready to accept a new command
Command Complete Interrupt Flag â The CCIF ï¬ag indicates that there are no more commands pending. The
CCIF ï¬ag is cleared when CBEIF is clear and sets automatically upon completion of all active and pending
commands. The CCIF ï¬ag does not set when an active commands completes and a pending command is
fetched from the command buffer. Writing to the CCIF ï¬ag has no effect. The CCIF ï¬ag is used together with the
CCIE bit in the FCNFG register to generate an interrupt request (see Figure 19-29).
0 Command in progress
1 All commands are completed
552
MC9S12C-Family / MC9S12GC-Family
Freescale Semiconductor
Rev 01.24
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