MC9S12C128V1 Datasheet, PDF (309/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
NOTE
Reading this register when in any other mode other than sleep or
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
10.3.2.15 MSCAN Transmit Error Counter (CANTXERR)
This register reflects the status of the MSCAN transmit error counter.
Module Base + 0x000F
7
R TXERR7
6
TXERR6
5
TXERR5
4
TXERR4
3
TXERR3
2
TXERR2
1
TXERR1
W
Reset:
0
0
0
0
0
0
0
= Unimplemented
Figure 10-18. MSCAN Transmit Error Counter (CANTXERR)
0
TXERR0
0
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and
INITAK = 1)
Write: Unimplemented
NOTE
Reading this register when in any other mode other than sleep or
initialization mode, may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
309
Rev 01.24