MC9S12C128V1 Datasheet, PDF (209/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

7.3.2.9
Chapter 7 Debug Module (DBGV1) Block Description
Debug Comparator A Extended Register (DBGCAX)
Module Base + 0x002A
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
PAGSEL
W
EXTCMP
Reset
0
0
0
0
0
0
0
0
Figure 7-15. Debug Comparator A Extended Register (DBGCAX)
Table 7-19. DBGCAX Field Descriptions
Field
Description
7:6
PAGSEL
5:0
EXTCMP
Page Selector Field — If DBGEN is set in DBGC1, then PAGSEL selects the type of paging as shown in Table 7-
20.
DPAGE and EPAGE are not yet implemented so the value in bit 7 will be ignored (i.e., PAGSEL values of 10 and
11 will be interpreted as values of 00 and 01, respectively).
In BKP mode, PAGSEL has no meaning and EXTCMP[5:0] are compared to address bits [19:14] if the address
is in the FLASH/ROM memory space.
Comparator A Extended Compare Bits — The EXTCMP bits are used as comparison address bits as shown
in Table 7-20 along with the appropriate PPAGE, DPAGE, or EPAGE signal from the core.
Table 7-20. Comparator A or B Compares
Mode
EXTCMP Compare
High-Byte Compare
BKP⁽¹⁾ Not FLASH/ROM access
No compare
DBGCxH[7:0] = AB[15:8]
DBG⁽²⁾
FLASH/ROM access
PAGSEL = 00
EXTCMP[5:0] = XAB[19:14]
No compare
DBGCxH[5:0] = AB[13:8]
DBGCxH[7:0] = AB[15:8]
PAGSEL = 01
EXTCMP[5:0] = XAB[21:16]
DBGCxH[7:0] = XAB[15:14], AB[13:8]
1. See Figure 7-16.
2. See Figure 7-10 (note that while this figure provides extended comparisons for comparator C, the figure also pertains to
comparators A and B in DBG mode only).
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
209
Rev 01.24