MC9S12C128V1 Datasheet, PDF (473/690 Pages) Freescale Semiconductor, Inc – MC9S12C Family MC9S12GC Family Reference Manual

Chapter 17 16 Kbyte Flash Module (S12FTS16KV1)
17.3 Memory Map and Registers
This section describes the FTS16K memory map and registers.
17.3.1 Module Memory Map
The FTS16K memory map is shown in Figure 17-2. The HCS12 architecture places the Flash array
addresses between 0xC000 and 0xFFFF. The content of the HCS12 Core PPAGE register is used to map
the logical page ranging from address 0x8000 to 0xBFFF to a physical 16K byte page in the Flash array
memory.¹ The FPROT register (see Section 17.3.2.5) can be set to globally protect the entire Flash array
or one growing downward from the Flash array end address. The higher address area is mainly targeted to
hold the boot loader code since it covers the vector space. Default protection settings as well as security
information that allows the MCU to restrict access to the Flash module are stored in the Flash configuration
field described in Table 17-1.
Flash Address
0xFF00–0xFF07
0xFF08–0xFF0C
0xFF0D
0xFF0E
0xFF0F
Table 17-1. Flash Configuration Field
Size
(bytes)
8
5
1
1
1
Description
Backdoor Key to unlock security
Reserved
Flash Protection byte
Refer to Section 17.3.2.5, “Flash Protection Register (FPROT)”
Reserved
Flash Security/Options byte
Refer to Section 17.3.2.2, “Flash Security Register (FSEC)”
1. By placing 0x3F in the HCS12 Core PPAGE register, the 16 Kbyte page can be seen twice in the MCU memory map.
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MC9S12C-Family / MC9S12GC-Family
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