EP2SGX60CF780C4N Datasheet, PDF (91/316 Pages) Altera Corporation – Support for numerous single-ended and differential I/O standards

Stratix II GX Architecture
Table 2–21 shows the number of DSP blocks in each Stratix II GX device.
DSP block multipliers can optionally feed an adder/subtractor or
accumulator in the block, depending on the configuration, which makes
routing to ALMs easier, saves ALM routing resources, and increases
performance because all connections and blocks are in the DSP block.
Table 2–21. DSP Blocks in Stratix II GX Devices Note (1)
Device DSP Blocks
EP2SGX30
16
EP2SGX60
36
EP2SGX90
48
EP2SGX130
63
Total 9 × 9
Multipliers
128
288
384
504
Total 18 × 18
Multipliers
64
144
192
252
Total 36 × 36
Multipliers
16
36
48
63
Note to Table 2–21:
(1) This list only shows functions that can fit into a single DSP block. Multiple DSP
blocks can support larger multiplication functions.
Additionally, the DSP block input registers can efficiently implement shift
registers for FIR filter applications, and DSP blocks support Q1.15 format
rounding and saturation. Figure 2–58 shows the top-level diagram of the
DSP block configured for 18 × 18-bit multiplier mode.
Altera Corporation
October 2007
2–83
Stratix II GX Device Handbook, Volume 1