EP2SGX60CF780C4N Datasheet, PDF (270/316 Pages) Altera Corporation – Support for numerous single-ended and differential I/O standards

Table 4–88. Stratix II GX Maximum Input Clock Rate for Column I/O Pins (Part 2 of 2)
I/O Standard
Differential SSTL-18
Class I I
1.8-V differential
HSTL Class I
1.8-V differential
HSTL Class II
1.5-V differential
HSTL Class I
1.5-V differential
HSTL Class I I
1.2-V HSTL
1.2-V differential
HSTL
-3 Speed Grade
500
500
500
500
500
280
280
-4 Speed Grade
500
500
500
500
500
250
250
-5 Speed Grade
500
500
500
500
500
250
250
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Table 4–89 shows the maximum input clock toggle rates for Stratix II GX
device row pins.
Table 4–89. Stratix II GX Maximum Input Clock Rate for Row I/O Pins (Part 1 of 2)
I/O Standard
LVTTL
2.5 V
1.8 V
1.5 V
LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
1.8-V HSTL Class I
1.8-V HSTL Class II
PCI
PCI-X
Differential SSTL-2
Class I
-3 Speed Grade
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
-4 Speed Grade
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
-5 Speed Grade
450
450
450
450
450
500
500
500
500
500
500
500
500
425
425
500
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz