EP2SGX60CF780C4N Datasheet, PDF (16/316 Pages) Altera Corporation – Support for numerous single-ended and differential I/O standards

Transceivers
Table 2–4 shows the data path configurations for the Stratix II GX device
in single-width and double-width modes.
1 Refer to the section “8B/10B Encoder” on page 2–8 for a
description of the single- and double-width modes.
Table 2–4. Data Path Configurations Note (1)
Single-Width Mode
Double-Width Mode
Parameter
Fabric to PCS data path width (bits)
Data rate range (Gbps)
PCS to PMA data path width (bits)
Byte ordering (1)
Data symbol A (MSB)
Data symbol B
Data symbol C
Data symbol D (LSB)
Without Byte
Serialization/
Deserialization
8 or 10
0.6 to 2.5
8 or 10
v
With Byte
Without Byte
With Byte
Serialization/ Serialization/ Serialization/
Deserialization Deserialization Deserialization
16 or 20
16 or 20
32 or 40
0.6 to 3.125
1 to 5.0
1 to 6.375
8 or 10
16 or 20
16 or 20
v
v
v
v
v
v
v
v
v
v
Note to Table 2–4:
(1) Designs can use byte ordering when byte serialization and deserialization are used.
8B/10B Encoder
There are two different modes of operation for 8B/10B encoding.
Single-width (8-bit) mode supports natural data rates from 622 Mbps to
3.125 Gbps. Double-width (16-bit cascaded) mode supports data rates
above 3.125 Gbps. The encoded data has a maximum run length of five.
The 8B/10B encoder can be bypassed. Figure 2–5 diagrams the 10-bit
encoding process.
2–8
Stratix II GX Device Handbook, Volume 1
Altera Corporation
October 2007