EP2SGX60CF780C4N Datasheet, PDF (188/316 Pages) Altera Corporation – Support for numerous single-ended and differential I/O standards

Operating Conditions
Table 4–19 shows the Stratix II GX transceiver block AC specifications.
Table 4–19. Stratix II GX Transceiver Block AC Specification Notes (1), (2), (3) (Part 1 of 19)
Symbol/
Description
Conditions
-3 Speed
Commercial Speed
Grade
-4 Speed
Commercial and
Industrial Speed
Grade
-5 Speed
Commercial Speed
Grade
Unit
Min Typ Max Min Typ Max Min Typ Max
SONET/SDH Transmit Jitter Generation (7)
Peak-to-peak jitter REFCLK =
-
- 0.1 -
- 0.1 -
-
0.1
UI
at 622.08 Mbps 77.76 MHz
Pattern = PRBS23
V_OD = 800 mV
No Pre-emphasis
RMS jitter at
622.08 Mbps
REFCLK =
-
- 0.01 -
- 0.01 -
- 0.01 UI
77.76 MHz
Pattern = PRBS23
V_OD = 800 mV
No Pre-emphasis
Peak-to-peak jitter REFCLK =
-
- 0.1 -
- 0.1 -
-
0.1
UI
at 2488.32 Mbps 155.52 MHz
Pattern = PRBS23
V_OD = 800 mV
No Pre-emphasis
RMS jitter at
REFCLK =
-
- 0.01 -
- 0.01 -
- 0.01 UI
2488.32 Mbps
155.52 MHz
Pattern = PRBS23
V_OD = 800 mV
No Pre-emphasis
4–18
Stratix II GX Device Handbook, Volume 1
Altera Corporation
June 2009