EP2SGX60CF780C4N Datasheet, PDF (190/316 Pages) Altera Corporation – Support for numerous single-ended and differential I/O standards

Operating Conditions
Table 4–19. Stratix II GX Transceiver Block AC Specification Notes (1), (2), (3) (Part 3 of 19)
Symbol/
Description
Conditions
-3 Speed
Commercial Speed
Grade
-4 Speed
Commercial and
Industrial Speed
Grade
-5 Speed
Commercial Speed
Grade
Unit
Min Typ Max Min Typ Max Min Typ Max
Fibre Channel Transmit Jitter Generation (8), (17)
Total jitter FC-1
REFCLK =
106.25 MHz
Pattern = CRPAT
V_OD = 800 mV
No Pre-emphasis
-
- 0.23 -
- 0.23 -
- 0.23 UI
Deterministic jitter
FC-1
REFCLK =
106.25 MHz
Pattern = CRPAT
V_OD = 800 mV
No Pre-emphasis
-
- 0.11 -
- 0.11 -
- 0.11 UI
Total jitter FC-2
REFCLK =
106.25 MHz
Pattern = CRPAT
V_OD = 800 mV
No Pre-emphasis
-
- 0.33 -
- 0.33 -
- 0.33 UI
Deterministic jitter
FC-2
REFCLK =
106.25 MHz
Pattern = CRPAT
V_OD = 800 mV
No Pre-emphasis
-
- 0.2 -
- 0.2 -
-
0.2
UI
Total jitter FC-4
REFCLK =
106.25 MHz
Pattern = CRPAT
V_OD = 800 mV
No Pre-emphasis
-
- 0.52 -
- 0.52 -
- 0.52 UI
Deterministic jitter
FC-4
REFCLK =
106.25 MHz
Pattern = CRPAT
V_OD = 800 mV
No Pre-emphasis
-
- 0.33 -
Fibre Channel Receiver Jitter Tolerance (8), (18)
- 0.33 -
- 0.33 UI
Deterministic jitter Pattern = CJTPAT
FC-1
No Equalization
DC Gain = 0 dB
> 0.37
> 0.37
> 0.37
UI
Random jitter FC- Pattern = CJTPAT
1
No Equalization
DC Gain = 0 dB
> 0.31
> 0.31
> 0.31
UI
4–20
Stratix II GX Device Handbook, Volume 1
Altera Corporation
June 2009