EP2SGX60CF780C4N Datasheet, PDF (308/316 Pages) Altera Corporation – Support for numerous single-ended and differential I/O standards

Table 4–118. Document Revision History (Part 2 of 5)
Date and
Document
Version
August 2007
v4.4
May 2007 v4.3
Changes Made
Removed note “The data in this table is preliminary.
Altera will provide a report upon completion of
characterization of the Stratix II GX devices.
Conditions for testing the silicon have not been
determined.” from each table.
Removed note “The data in Tables xxx through xxx
is preliminary. Altera will provide a report upon
completion of characterization of the Stratix II GX
devices. Conditions for testing the silicon have not
been determined.” in the clock timing parameters
sections.
Updated clock timing parameter Tables 4–63
through 4–78 (Table 4–75 was unchanged).
Updated Table 4–21 and added new Table 4–22.
Updated:
● Table 4–6
● Table 4–16
● Table 4–19
● Table 4–49
● Table 4–52
● Table 4–107
Added note to Table 4–50.
Added:
● Figure 4–3
● Figure 4–4
● Figure 4–5
Added the “Referenced Documents” section.
Changed 1.875 KHz to 1.875 MHz in Table 4–19,
XAUI Receiver Jitter Tolerance section.
Summary of Changes