Z80189 Datasheet, PDF (95/107 Pages) Zilog, Inc. – GENERAL-PURPOSE EMBEDDED CONTROLLERS

Zilog
PRELIMINARY
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
Z80189 ROM/RAM WAIT STATE GENERATOR
A separate Wait State Generator is provided for access
memory using /ROMCS and /RAMCS. A single eight bit
register is added to enable/disable this feature as well as
provide two 3-bit fields that provides a 1-8 waits for each
chip select.
Bit 7 /RAMCS Wait State Generator Enable.
Disable on power-up or reset.
Bit 6-4 /RAMCS Wait States 1-8.
8 wait states on power-up or reset.
Bit 3 /ROMCS Wait State Generator Enable.
Disable on power-up or reset.
765 43210
0
0
/ROMCS
Wait States
1-8
/ROMCS Wait State
Generator Enable
/RAMCS
Wait States
1-8
/RAMCS Wait State
Generator Enable
Bit 2-0 /ROMCS Wait States 1-8.
8 wait states on power-up or reset.
If Wait State is disabled or RAMCS and ROMCS is not
asserted, the memory access is default to Wait State
programmed in the DCNTL register of Z180 DMAs. Note
that the wait states inserted by this register and DCNTL do
not add. The actual number of wait states inserted is the
greater of the two.
Figure 121. WSG Chip Select Register
(Z180 MPU Read/Write, Address XXD8H)
Note: That the wait states inserted by this register and
DCNTL do not add. The actual number of wait states
inserted is the greater of the two.
DS971890301
95