Z80189 Datasheet, PDF (92/107 Pages) Zilog, Inc. – GENERAL-PURPOSE EMBEDDED CONTROLLERS

Zilog
PRELIMINARY
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
Z189 MISCELLANEOUS CONTROL AND INTERFACE REGISTERS (Continued)
I/O and Memory Transactions
I/O Write
to On-Chip
Peripherals
Z80189
Data Bus
Out
(DDOUT=0)
Z80189
Data Bus
Out
(DDOUT=1)
I/O Read
from On-Chip
Peripherals
Z
Out
I/O Write
I/O Read
to Off-Chip from Off-Chip Write to Write from
Z80189
Peripherals Peripherals Memory Memory Refresh Idle Mode
Out
In
Out
In
Z
Z
Out
In
Out
In
Z
Z
Interrupt Acknowledge Transaction
Z80189
Data Bus
(DDOUT=0)
Z80189
Data Bus
(DDOUT=1)
Intack for
On-Chip
Peripheral
Z
Out
Intack for
Off-Chip
Peripheral
In
In
Figure 116. Data Bus Direction (Z180 Bus Master)
The word “Out” means that the Z189 data bus direction is
in output mode, “In” means input mode, and “Z” means
High impedance. D stands for Data Direction out and
DOUT
is the status of the D4 bit in the System Configuration
Register.
Bit 1 MIMIC/Port A
When this bit is set, MIMIC is multiplexed over Port A. This
is enabled on power-up.
Bit 0 Reserved
Bit 3 Disable ROMs
If this bit is a one it disables the /ROMCS pin. If it is a zero
addresses below the ROM boundary set by the ROMBR
register will cause the /ROMCS pin to go low.
Bit 2 Borrow
For Bit 2 of the System Configuration Register when the bit
is set to 0, the HINTR1/T is multiplexed to T . When this
OUT
OUT
bit is set to 1, the HINTR1/T bit is multiplexed to HINTR1.
OUT
This bit is set to 1 upon reset.
Note: MIMIC access is disabled until the first system
configuration register write after Power-up or reset. This
mechanism prevents accidental bus counter from if
/HDCS/HC1 pin is pulled Low. To avoid accidental conten-
tion when /HCS/HC1 is pulled low, it is advisable that the
COM Decode Register is written first prior to when the
system configuration register is initialized.
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