Z80189 Datasheet, PDF (47/107 Pages) Zilog, Inc. – GENERAL-PURPOSE EMBEDDED CONTROLLERS

Zilog
TDR0
Write Only
Addr 06H
7 6 5 4 32 1 0
PRELIMINARY
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
765 43210
0 00 0 0 00 0
New Z8S180 Register
Transmit Data
Figure 38. ASCI Transmit Data Register (Ch. 0)
TDR1
Write Only
Addr 07H
7 6 5 4 3 2 10
Transmit Data
Figure 39. ASCI Transmit Data Register (Ch. 1)
TSR0
Read Only
Addr 08H
xxxxxxxx
Received Data
Send Break
0 = Normal Xmit
1 = Drive TXA Low
Break Detect (RO)
Break Feature Enable
BRG0 Mode
0 = as S180
1 = Enable 16-bit BRG Counter
X1 Bit CLK ASCIO
0 = CKA0 /16 or /64
1 = CKA0 is bit clock
CTS0 Disable
0 = CTS0 Auto-enables Tx
1 = CTS0 Advisory to SW
DCD0 Disable
0 = DCD0 Auto-enables Rx
1 = DCD0 Advisory to SW
Reserved (Program as 0.)
Figure 42. ASCI0 Extension Control Register
(I/O Address 12)
Figure 40. ASCI Receive Data Register (Ch. 0)
TSR1
Read Only
Addr 09H
xxxxxxxx
Received Data
Figure 41. ASCI Receive Data Register (Ch. 1)
765 43210
0 00 0 0 00 0
New Z8S180 Register
Send Break
0 = Normal Xmit
1 = Drive TXA Low
Break Detect (RO)
Break Feature Enable
BRG1 Mode
0 = As S180
1 = Enable 16-bit BRG Counter
X1 Bit CLK ASCI1
0 = CKA1 /16 or /64
1 = CKA1 is bit Clock
Reserved (Program as 0.)
Figure 43. ASCI1 Extension Control Register
(I/O Address 13)
DS971890301
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