Z80189 Datasheet, PDF (25/107 Pages) Zilog, Inc. – GENERAL-PURPOSE EMBEDDED CONTROLLERS

Zilog
PC DMA TIMING
PRELIMINARY
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
Table 10. PC DMA Mailbox Timing
PD DMA Write: Memory-Read, I/O Write DMA Bus Cycle
No Sym
Parameter
Z8L189-20 MHz
Min
Max
Z80189-33 MHz
Min
Max
1 tACKWh /HDACK Active Hold
144
144
/HWR Inactive
2 tWRs
/HDACK Active to
301
301
/HWR Active
3 tWR
/HWR Active to
454
454
Inactive
4 tvWR
Data Valid to /HWR
133
133
Inactive
5 tDWRh Write Data Valid Hold 25
25
from /HWR Inactive
Units
ns
ns
ns
ns
ns
No Sym
1 tACKRh
2 tRDs
3 tRD
4 tvRD
5 tDRDh
6 tDZ
Table 11. PC DMA Mailbox Timing
PD DMA Read: I/O-Read, Memory-Write DMA Bus Cycle
Parameter
Z8L189-20 MHz
Min
Max
Z80189-33 MHz
Min
Max
/HDACK Active Hold
89
89
/HRD Inactive
/HDACK Active to
62
62
/HRD Active
/HRD Active to
749
749
Inactive
Data Valid from /HRD
215
215
Active
Read Data Valid Hold 0
0
from /HRD Inactive
Data Float from /HRD
50
50
Inactive
Units
ns
ns
ns
ns
ns
ns
DS971890301
25