Z80189 Datasheet, PDF (91/107 Pages) Zilog, Inc. – GENERAL-PURPOSE EMBEDDED CONTROLLERS

Zilog
PRELIMINARY
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
Z189 MISCELLANEOUS CONTROL AND INTERFACE REGISTERS
The Z80189 has the same capability of the Z180 MPU.
Some extra I/O registers have been added to the Z180
MPU to interface with the Parallel ports, COM Port Decode
and the 16550 MIMIC interface. A System Configuration
Register is located at the Z180 MPU I/O Address %EF
which determines the current operating mode. This regis-
ter must be WRITTEN before the MIMIC is enabled.
765 43210
11100111
Reserved as 1
MIMIC/Port A
0 = Port A
1 = MIMIC Data
Borrow
0 = Z80180
1 = 16550 MIMIC
Disable ROMs
0 = /ROMCS Enabled
1 = /ROMCS Disabled
DOUT
0 = No Data Out
1 = Data Out
Port PB4-PB0 Select
0 = ASCI Channel 0 Function
1 = PB4-PB0 Selected
Port PB7-PB5 Select
0 = ASCI Channel 1 Function
1 = PB7-PB5 Selected
Port C Read Select
0 = From Output Pad
1 = From Input Pins
Figure 115. System Configuration Register
(Z80180 MPU Address XXEFH)
Note: The COM Decode Register should be written prior to writing to this register.
Bit 7 Port C read
When this bit is set, a read from Port C will return value of
logic state on Port C. When this bit is reset, a read from Port
C will return the contents of Port C output pads (last value
output on port C). This bit is not relevant when Port C is
programmed for output.
Bit 6 PB7-PB5 Select
When this bit is set Port B bits 7-5 are multiplexed over
ASCI 1 functions. When this bit is reset ASCI 1 functions are
active.
Bit 5 PB4-PB0 Select
When this bit is set Port B bits 4-0 are multiplexed over
ASCI 0 functions. When this bit is reset ASCI functions are
active.
Bit 4 D ROM Emulator Mode Enable
DOUT
When this bit is set to a 1, the Z182 is in “ROM emulator
mode”. In this mode, bus direction for certain transaction
periods are set to the opposite direction to export internal
bus transactions outside the Z80189. This allows the use
of ROM emulators/logic analyzers for application develop-
ment. See Figures 115 and 116.
DS971890301
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