W83877ATF Datasheet, PDF (88/191 Pages) Winbond – enhanced version from Winbonds most popular I/O chip W83877F

W83877ATF
4.2 Enhanced Parallel Port (EPP)
TABLE 4-2 PRINTER MODE AND EPP REGISTER ADDRESS
A2
A1
A0
REGISTER
0
0
0
Data port (R/W)
0
0
1
Printer status buffer (Read)
0
1
0
Printer control latch (Write)
0
1
0
Printer control swapper (Read)
0
1
1
EPP address port (R/W)
1
0
0
EPP data port 0 (R/W)
1
0
1
EPP data port 1 (R/W)
1
1
0
EPP data port 2 (R/W)
1
1
1
EPP data port 2 (R/W)
Notes:
1. These registers are available in all modes.
2. These registers are available only in EPP mode.
NOTE
1
1
1
1
2
2
2
2
2
4.2.1 Data Swapper
The system microprocessor can read the contents of the printer's data latch by reading the data
swapper.
4.2.2 Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the printer status
buffer. The bit definitions are as follows:
7 6 5 4 32 1 0
11
TMOUT
ERROR
SLCT
PE
ACK
BUSY
Bit 7: This signal is active during data entry, when the printer is off-line during printing, when the print
head is changing position, or during an error state. When this signal is active, the printer is
busy and cannot accept data.
Bit 6: This bit represents the current state of the printer's ACK signal. A 0 means the printer has
received a character and is ready to accept another. Normally, this signal will be active for
approximately 5 microseconds before BUSY stops.
Bit 5: A 1 means the printer has detected the end of paper.
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Publication Release Date: April 1998
Version 0.51