W83877ATF Datasheet, PDF (153/191 Pages) Winbond – enhanced version from Winbonds most popular I/O chip W83877F

W83877ATF
ContinuedTable 8-1: Bit Map of Configuration Registers
CR20
CR23
CR24
CR25
CR26
CR27
CR28
CR29
1111 1100²
1101 1110²
1111 1110²
1011 1110²
0010 0011²
0000 0101²
0100 0011²
0110 0000²
FDCAD7
PRTAD7
URAAD7
URBAD7
FDCDQS3
ECPIRQx2
URAIQS3
FDCIQS3
FDCAD6
PRTAD6
URAAD6
URBAD6
FDCDQS2
ECPIRQx1
URAIQS2
FDCIQS2
FDCAD5
PRTAD5
URAAD5
URBAD5
FDCDQS1
ECPIRQx0
URAIQS1
FDCIQS1
FDCAD4
PRTAD4
URAAD4
URBAD4
FDCDQS0
0
URAIQS0
FDCIQS0
FDCAD3
PRTAD3
URAAD3
URBAD3
PRTDQS3
PRTIQS3
URBIQS3
IQNIQS3
FDCAD2
PRTAD2
URAAD2
URBAD2
PRTDQS2
PRTIQS2
URBIQS2
IQNIQS2
0
PRTAD1
URAAD1
URBAD1
PRTDQS1
PRTIQS1
URBIQS1
IQNIQS1
0
PRTAD0
0
0
PRTDQS0
PRTIQS0
URBIQS0
IQNIQS0
CR2A
0000 0000
IRTXDSL3
IRTXDSL2
IRTXDSL1
IRTXDSL0
IRRXDSL3
IRRXDSL2
IRRXDSL1
IRRXDSL0
CR2B
0000 0000
PIN1FUN1
PIN1FUN0
PIN2FUN1
PIN2FUN0
PIN3FUN1
PIN3FUN0
PIN93FUN1
PIN93FUN0
CR2C
0000 0000
PIN91FUN2
PIN91FUN1
PIN91FUN0
APEDCRC
ENBNKSL
CLKINSEL
0
0
CR2D
0000 0000
0
0
DIS-PRECOM1
DRTB 1
DRTB 0
DIS-PRECOM0
DRTA 1
DRTA 0
CR31
0000 0s00
SCIIRQ3
SCIIRQ2
SCIIRQ1
SCIIRQ0
0
IRQMODS
0
0
CR32
0000 0000
CHIPPME
0
0
0
PRTPME
FDCPME
URAPME
URBPME
CR33
0000 0000
PM1AD7
PM1AD6
PM1AD5
PM1AD4
PM1AD3
PM1AD2
0
0
CR34
0000 0000
GPEAD7
GPEAD6
GPEAD5
GPEAD4
GPEAD3
GPEAD2
GPEAD1
0
CR35
0000 0000
URACNT7
URACNT6
URACNT5
URACNT4
URACNT3
URACNT2
URACNT1
URACNT0
CR36
0000 0000
URBCNT7
URBCNT6
URBCNT5
URBCNT4
URBCNT3
URBCNT2
URBCNT1
URBCNT0
CR37
0000 0000
FDCCNT7
FDCCNT6
FDCCNT5
FDCCNT4
FDCCNT3
FDCCNT2
FDCCNT1
FDCCNT0
CR38
0000 0000
PRTCNT7
PRTCNT6
PRTCNT5
PRTCNT4
PRTCNT3
PRTCNT2
PRTCNT1
PRTCNT0
CR39
0000 0000
GSBCNT7
GSBCNT6
GSBCNT5
GSBCNT4
GSBCNT3
GSBCNT2
GSBCNT1
GSBCNT0
CR3A
0000 0000
0
0
TMIN_SEL
0
0
SMI_EN
0
UPULLEN
CR40
0000 0000
0
0
0
0
PRTIDLSTS
FDCIDLSTS
URAIDLSTS
URBIDLSTS
CR41
0000 0000
0
0
0
0
PRTTRAPSTS FDCTRAPSTS URATRAPSTS URBTRAPSTS
CR42
0000 0000
0
0
0
0
PRTIRQSTS
FDCIRQSTS URAIRQSTS
URBIRQSTS
CR43
0000 0000
0
0
0
0
0
0
0
0
CR44
0000 0000
0
0
0
0
0
0
0
0
CR45
0000 0000
0
0
0
0
PRTIRQEN
FDCIRQEN
Notes:
1. 's' means its value depends on corresponding power-on setting pin.
2. These default values are valid when CR16 bit 2 is 1 during power-on reset; They will be all 0's if CR16 bit 2 is 0.
URAIRQEN
URBIRQEN
- 149 -
Publication Release Date: April 1998
Version 0.51