W83877ATF Datasheet, PDF (66/191 Pages) Winbond – enhanced version from Winbonds most popular I/O chip W83877F

W83877ATF
Bit 5, 4:
PR_DIV1~0 - Pre-Divisor 1~0.
These bits select pre-divisor for external input clock 24M Hz. The clock through the pre-
divisor then inputs to baud rate divisor of UART.
PR_DIV1~0
00
01
10
11
Pre-divisor
13.0
1.625
6.5
1
Max. Baud Rate
115.2K bps
921.6K bps
230.4K bps
1.5M bps
Bit 3, 2:
RX_FSZ1~0 - Receiver FIFO Size 1~0
These bits setup receiver FIFO size when FIFO is enabled.
RX_FSZ1~0
00
01
1X
RX FIFO Size
16-Byte
32-Byte
Reserved
Bit 2, 0:
TX_FSZ1~0 - Transmitter FIFO Size 1~0
These bits setup transmitter FIFO size when FIFO is enabled.
TX_FSZ1~0
00
01
1X
TX FIFO Size
16-Byte
32-Byte
Reserved
4.3.4.5 Reg6 - Transmitter FIFO Depth (TXFDTH) (Read Only)
Mode
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Advanced 0
UART
Reset Value
0
0
TXFD5 TXFD4 TXFD3
0
0
0
0
Bit 2
TXFD2
0
Bit 1
TXFD1
0
Bit 0
TXFD1
0
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Publication Release Date: April 1998
Version 0.51