W83877ATF Datasheet, PDF (76/191 Pages) Winbond – enhanced version from Winbonds most popular I/O chip W83877F

W83877ATF
4.3.8.3 Set6.Reg2 - SIR Pulse Width
Reg.
Bit 7
Bit 6
Bit 5
SIR_PW
-
-
-
Reset Value
0
0
0
Bit 4
S_PW4
0
Bit 3
S_PW3
0
Bit 2
S_PW2
0
Bit 1
S_PW1
0
Bit 0
S_PW0
0
This 5-bit register is set SIR output pulse width.
S_PW4~0
SIR Output Pulse Width
00000
01101
Others
3/16 bit time of UART
1.6 us
1.6 us
4.3.8.4 Set6.Reg3 - Set Select Register
A write to this register will result in going to other Set. Reading this register returns F016.
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
SSR
default Value
SSR7
1
SSR6
1
SSR5
1
SSR4
1
SSR3
0
SSR2
0
SRR1
0
Bit 0
SRR0
0
4.3.8.5 Set6.Reg4 - High Speed Infrared Beginning Flag Number (HIR_FNU)
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
HIR_FNU M_FG3
Reset Value
0
M_FG2
0
M_FG1
1
M_FG0
0
F_FL3
1
F_FL2
0
F_FL1
1
Bit 0
F_FL0
0
Bit 7~4:
M_FG3~0 - MIR beginning Flag Number
These bits define the number of transmitter Start Flag of MIR. Note that the number of
MIR start flag should be equal to or more than two which is defined in IrDA 1.1 physical
layer. The default value is 2.
- 72 -
Publication Release Date: April 1998
Version 0.51