W83877ATF Datasheet, PDF (62/191 Pages) Winbond – enhanced version from Winbonds most popular I/O chip W83877F

W83877ATF
Bit 5
Bit 4:
Bit 3
Bit 2:
Bit 1:
Bit 0:
MIR, FIR modes:
RX_BSY - Receiver Busy
Set to 1 when receiver is busy or active in process.
Remote IR mode:
RX_IP - Receiver in Process
Set to 1 when receiver is in process.
MIR, FIR modes:
LST_FE - Lost Frame End
Set to 1 when a frame end for an entire frame is lost. Clear to 0 when read this register.
Remote IR modes:
RX_PD - Receiver Pulse Detected
Set to 1 when one or more than one remote pulses are detected. Clear to 0 when read
this register.
MIR, FIR modes:
S_FEND - Set a Frame End
Write to 1 when wanting to terminate the frame; that is, the procedure of PIO command is
An Entire Frame = Write Frame Data (First) + Write S_FEND (Last)
This bit should be set to 1, if used in PIO mode, to avoid transmitter underrun. Note that
this bit S_FEND is set to 1, that is, equivalent to TC (Terminal Count) in DMA mode.
This bit should therefore be set to 0 in DMA mode.
Reserved.
MIR, FIR modes:
LB_SF - Last Byte Stay in FIFO
Set to 1 that indicates one or more than one frame end still stay in receiver FIFO.
MIR, FIR, Remote IR modes:
RX_TO - Receiver FIFO or Frame Status FIFO time-out
Set to 1 when receiver FIFO or frame status FIFO occurs time-out
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Publication Release Date: April 1998
Version 0.51