W83877ATF Datasheet, PDF (55/191 Pages) Winbond – enhanced version from Winbonds most popular I/O chip W83877F

W83877ATF
4.3.2.2 Set0.Reg1 - Interrupt Control Register (ICR)
Mode
B7
B6
B5
B4
B3
B2
B1
B0
UART
0
0
0
0
EHSRI EUSRI ETBREI ERDRI
Advanced ETMRI EFSFI ETXTHI EDMAI EHSRI EUSRI/ ETBREI ERXTHI
UART
TXURI
Where UART is used to Legacy UART, and the functions for these bits are defined in the previous
UART, the traditional SIR or ASK-IR based on the legacy UART also has the same definitions. The
advanced UART functions, including Advanced SIR/ASK-IR, MIR, FIR, or Remote IR, are described
as follows.
Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
ETMRI - Enable Timer Interrupt
Write to 1, enable timer interrupt.
MIR, FIR mode:
EFSFI - Enable Frame Status FIFO Interrupt
Write to 1, enable frame status FIFO interrupt.
Advanced SIR/ASK-IR, Remote IR:
Not used.
Advanced SIR/ASK-IR, MIR, FIR, Remote IR:
ETXTHI - Enable Transmitter Threshold Interrupt
Write to 1, enable transmitter threshold interrupt.
MIR, FIR, Remote IR:
EDMAI - Enable DMA Interrupt.
Write to 1, enable DMA interrupt.
Advanced UART/SIR/ASK-IR, MIR, FIR, Remote IR:
EHSRI - Enable HSR (Handshake Status Register) Interrupt
Write to 1, enable handshake status register interrupt. Note that the bit IRHSSL (Infrared
Handshake Select) should be set to 1, then this bit EHSRI is effective.
Advanced SIR/ASK-IR:
EUSRI - Enable USR (UART Status Register) Interrupt
Write to 1, enable UART status register interrupt.
MIR, FIR, Remote Controller:
EHSRI/ETXURI - Enable USR Interrupt or Enable Transmitter Underrun Interrupt
Write to 1, enable USR interrupt or enable transmitter underrun interrupt.
ETBREI - Enable TBR (Transmitter Buffer Register) Empty Interrupt
Write to 1, enable transmitter buffer register empty interrupt.
ERBRI - Enable RDR (Receiver Buffer Register) Interrupt
Write to 1, enable receiver buffer register interrupt.
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Publication Release Date: April 1998
Version 0.51