W83877ATF Datasheet, PDF (75/191 Pages) Winbond – enhanced version from Winbonds most popular I/O chip W83877F

W83877ATF
Bit 5:
Bit 4:
Bit 2:
Bit 1:
Bit 0:
FIR_CRC - FIR (4M bps) CRC Type
FIR_CRC
CRC Type
0
16-bit CRC
1
32-bit CRC
Note that the 16/32-bit CRC are defined in IrDA 1.1 physical layer.
MIR_CRC - MIR (1.152M/0.576M bps) CRC Type
MIR_CRC
CRC Type
0
16-bit CRC
1
32-bit CRC
INV_CRC - Inverting CRC
Write to 1 causes CRC inverted output in physical layer.
DIS_CRC - Disable CRC
Write to 1 causes the transmitter not to transmit CRC in physical layer.
Reserved, write 1.
4.3.8.2 Set6.Reg1 - MIR (1.152M/0.576M bps) Pulse Width
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
MIR_PW
-
-
-
M_PW4 M_PW3
Reset Value
0
0
0
0
1
This 5-bit register is set MIR output pulse width.
Bit 2
M_PW2
0
Bit 1
M_PW1
1
Bit 0
M_PW0
0
M_PW4~0
00000
00001
00010
...
k₁₀
...
11111
MIR Pulse Width
(1.152M bps)
0 ns
20.83 ns
41.66 (==20.83*2) ns
...
20.83*k₁₀ ns
...
645 ns
MIR Output Width
(0.576M bps)
0 ns
41.66 ns
83.32 (==41.66*2) ns
...
41.66*k₁₀ ns
...
1290 ns
- 71 -
Publication Release Date: April 1998
Version 0.51