W83877ATF Datasheet, PDF (151/191 Pages) Winbond – enhanced version from Winbonds most popular I/O chip W83877F

W83877ATF
These bits enable the generation of an SMI interrupt due to any IRQ of the devices respectively.
These 4 bits control the printer port, FDC, UART A, and UART B SMI logics individually. The SMI
logic output for the IRQs is as follows:
SMI logic output = (URBIRQEN and URBIRQSTS) or (URAIRQEN and URAIRQSTS) or
(FDCIRQEN and FDCIRQSTS) or (PRTIRQEN and PRTIRQSTS)
If any device's IRQ is raised, the coresponding IRQ status bit in CR42 is set. If the device's enable bit
is set and SMI_EN(in CR3A) and CHIPPME(in CR32) is both set, then SMI interrupt occurs on the
SMI output pin.
PRTIRQEN (Bit 3):
0
disable the generation of an SMI interrput due to the printer port's IRQ.
1
enable the generation of an SMI interrput due to the printer port's IRQ.
FDCIRQEN (Bit 2):
0
disable the generation of an SMI interrupt due to the FDC's IRQ.
1
enable the generation of an SMI interrupt due to the FDC's IRQ.
URAIRQEN (Bit 1):
0
disable the generation of an SMI interrupt due to the UART A's IRQ.
1
enable the generation of an SMI interrupt due to the UART A's IRQ.
URBIRQEN (Bit 0):
0
disable the generation of an SMI interrupt due to the UART B's IRQ.
1
enable the generation of an SMI interrupt due to the UART B's IRQ.
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Publication Release Date: April 1998
Version 0.51