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LM3S5G51 Datasheet, PDF (779/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller
Stellaris® LM3S5G51 Microcontroller
Figure 16-2 on page 779 provides an example of an I2S data transfer. Figure 16-3 on page 779
provides an example of an Left-Justified data transfer. Figure 16-4 on page 779 provides an example
of an Right-Justified data transfer.
Figure 16-2. I2S Data Transfer
SCK
Word Select
Serial Data
MSB
LSB MSB
WORD n-1
RIGHT
CHANNEL
WORD n
LEFT
CHANNEL
WORD n+1
RIGHT
CHANNEL
Figure 16-3. Left-Justified Data Transfer
Word
Select
SCLK
Serial
Data
System Data Size
Left Channel
MSB -1 -2 -3 -4 -5 +5 +4 +3 +2 +1 LSB
Sample Size
Right Channel
MSB -1 -2 -3 -4 +5 +4 +3 +2 +1 LSB
Figure 16-4. Right-Justified Data Transfer
Word
Select
SCLK
Serial 0
Data
System Data Size
Left Channel
MSB -1 -2 -3 -4 -5
+7 +6 +5 +4 +3 +2 +1 LSB
Sample Size
Right Channel
MSB -1 -2 -3 -4 -5
+7 +6 +5 +4 +3 +2 +1 LSB
16.3.1
Transmit
The transmitter consists of a serial encoder, an 8-entry FIFO, and control logic. The transmitter has
independent MCLK (I2S0TXMCLK), SCLK (I2S0TXSCK), and Word-Select (I2S0TXWS) signals.
16.3.1.1
Serial Encoder
The serial encoder reads audio samples from the receive FIFO and converts them into an audio
stream. By configuring the serial encoder, common audio formats I2S, Left-Justified, and
Right-Justified are supported. The MSB is transmitted first. The sample size and system data size
January 23, 2012
779
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