LM3S5G51 Datasheet, PDF (285/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Stellaris^® LM3S5G51 Microcontroller
Bit/Field
17
16
15
14
13
12
11:10
9
8
7:6
5
4
Name
TIMER1
TIMER0
reserved
I2C1
reserved
I2C0
reserved
QEI1
QEI0
reserved
SSI1
SSI0
Type
R/W
R/W
RO
R/W
RO
R/W
RO
R/W
R/W
RO
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
Description
Timer 1 Reset Control
When this bit is set, General-Purpose Timer module 1 is reset. All internal
data is lost and the registers are returned to their reset states. This bit
must be manually cleared after being set.
Timer 0 Reset Control
When this bit is set, General-Purpose Timer module 0 is reset. All internal
data is lost and the registers are returned to their reset states. This bit
must be manually cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C1 Reset Control
When this bit is set, I2C module 1 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C0 Reset Control
When this bit is set, I2C module 0 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
QEI1 Reset Control
When this bit is set, QEI module 1 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
QEI0 Reset Control
When this bit is set, QEI module 0 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI1 Reset Control
When this bit is set, SSI module 1 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
SSI0 Reset Control
When this bit is set, SSI module 0 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
January 23, 2012
285
Texas Instruments-Production Data