LM3S5G51 Datasheet, PDF (427/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Stellaris^® LM3S5G51 Microcontroller
Table 9-3. GPIO Pins and Alternate Functions (108BGA) (continued)
IO
Pin
Analog
Function
1
2
Digital Function (GPIOPCTL PMCx Bit Field Encoding)^a
3
4
5
6
7
8
9
10
11
PH4 B10
-
-
-
- USB0PFLT -
-
-
-
-
- SSI1Clk
PH5 F10
-
-
-
-
-
-
-
-
-
- Fault2 SSI1Fss
PH6 G3
-
-
-
-
-
-
-
-
-
-
PWM4 SSI1Rx
PH7 H3
-
-
-
-
-
-
-
-
-
-
PWM5 SSI1Tx
PJ0 F3
-
-
-
-
-
-
-
-
-
-
PWM0 I2C1SCL
PJ1 B6
-
-
-
-
-
-
-
-
- USB0PFLT PWM1 I2C1SDA
PJ2 K6
-
-
-
-
-
-
-
-
-
CCP0 Fault0
-
a. The digital signals that are shaded gray are the power-on default values for the corresponding GPIO pin.
9.2 Functional Description
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure
9-1 on page 427 and Figure 9-2 on page 428). The LM3S5G51 microcontroller contains nine ports
and thus nine of these physical GPIO blocks. Note that not all pins may be implemented on every
block. Some GPIO pins can function as I/O signals for the on-chip peripheral modules. For information
on which GPIO pins are used for alternate hardware functions, refer to Table 23-5 on page 1143.
Figure 9-1. Digital I/O Pads
Port
Control
GPIOPCTL
Commit
Control
GPIOLOCK
GPIOCR
Mode
Control
GPIOAFSEL
Periph 0
Periph 1
Periph n
Alternate Input
Alternate Output
Alternate Output Enable
Data
Control
GPIODATA
GPIODIR
GPIO Input
GPIO Output
GPIO Output Enable
Pad Input
Pad Output
Pad Output
Enable
Digital
I/O
Pad
Package I/O Pin
Interrupt
Interrupt
Control
GPIOIS
GPIOIBE
GPIOIEV
GPIOIM
GPIORIS
GPIOMIS
GPIOICR
Pad
Control
GPIODR2R
GPIODR4R
GPIODR8R
GPIOSLR
GPIOPUR
GPIOPDR
GPIOODR
GPIODEN
Identification Registers
GPIOPeriphID0
GPIOPeriphID1
GPIOPeriphID2
GPIOPeriphID3
GPIOPeriphID4
GPIOPeriphID5
GPIOPeriphID6
GPIOPeriphID7
GPIOPCellID0
GPIOPCellID1
GPIOPCellID2
GPIOPCellID3
January 23, 2012
427
Texas Instruments-Production Data