LM3S5G51 Datasheet, PDF (212/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

System Control
Bit/Field
6
5:2
1
0
Name
PLLLMIS
reserved
BORMIS
reserved
Type
R/W1C
Reset
0
Description
PLL Lock Masked Interrupt Status
Value Description
1 When read, a 1 indicates that an unmasked interrupt was
signaled because sufficient time has passed for the PLL to lock.
Writing a 1 to this bit clears it and also the PLLLRIS bit in the
RIS register.
0 When read, a 0 indicates that sufficient time has not passed for
the PLL to lock.
A write of 0 has no effect on the state of this bit.
RO
R/W1C
0x0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
BOR Masked Interrupt Status
Value Description
1 When read, a 1 indicates that an unmasked interrupt was
signaled because of a brown-out condition.
Writing a 1 to this bit clears it and also the BORRIS bit in the
RIS register.
0 When read, a 0 indicates that a brown-out condition has not
occurred.
A write of 0 has no effect on the state of this bit.
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
212
January 23, 2012
Texas Instruments-Production Data