LM3S5G51 Datasheet, PDF (1020/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Pulse Width Modulator (PWM)
Table 20-2. PWM Signals (108BGA) (continued)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
PWM2
H2
PD2 (3)
O
J11
PF2 (4)
E12
PB0 (2)
C9
PH0 (2)
TTL
PWM 2. This signal is controlled by PWM Generator
1.
PWM3
H1
PD3 (3)
O
J12
PF3 (4)
D12
PB1 (2)
C8
PH1 (2)
TTL
PWM 3. This signal is controlled by PWM Generator
1.
PWM4
A1
PE6 (1)
O
K1
PG0 (4)
M4
PA2 (4)
L6
PA6 (5)
J11
PF2 (2)
G3
PH6 (10)
B11
PE0 (1)
C9
PH0 (9)
TTL
PWM 4. This signal is controlled by PWM Generator
2.
PWM5
B1
PE7 (1)
O
H3
PH7 (10)
K2
PG1 (4)
L4
PA3 (4)
M6
PA7 (5)
J12
PF3 (2)
A12
PE1 (1)
C8
PH1 (9)
TTL
PWM 5. This signal is controlled by PWM Generator
2.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
20.3 Functional Description
20.3.1
PWM Timer
The timer in each PWM generator runs in one of two modes: Count-Down mode or Count-Up/Down
mode. In Count-Down mode, the timer counts from the load value to zero, goes back to the load
value, and continues counting down. In Count-Up/Down mode, the timer counts from zero up to the
load value, back down to zero, back up to the load value, and so on. Generally, Count-Down mode
is used for generating left- or right-aligned PWM signals, while the Count-Up/Down mode is used
for generating center-aligned PWM signals.
The timers output three signals that are used in the PWM generation process: the direction signal
(this is always Low in Count-Down mode, but alternates between Low and High in Count-Up/Down
mode), a single-clock-cycle-width High pulse when the counter is zero, and a single-clock-cycle-width
High pulse when the counter is equal to the load value. Note that in Count-Down mode, the zero
pulse is immediately followed by the load pulse. In the figures in this chapter, these signals are
labelled "dir," "zero," and "load."
20.3.2
PWM Comparators
Each PWM generator has two comparators that monitor the value of the counter; when either
comparator matches the counter, they output a single-clock-cycle-width High pulse, labelled "cmpA"
and "cmpB" in the figures in this chapter. When in Count-Up/Down mode, these comparators match
both when counting up and when counting down, and thus are qualified by the counter direction
signal. These qualified pulses are used in the PWM generation process. If either comparator match
value is greater than the counter load value, then that comparator never outputs a High pulse.
1020
Texas Instruments-Production Data
January 23, 2012