LM3S5G51 Datasheet, PDF (1079/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Stellaris^® LM3S5G51 Microcontroller
Bit/Field
6
5
4
3
Name
DCMP6
DCMP5
DCMP4
DCMP3
Type
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Description
Digital Comparator 6
Value Description
0 The trigger from digital comparator 6 is suppressed and cannot
generate a fault condition.
1 The trigger from digital comparator 6 is ORed with all other fault
condition generation inputs (Faultn signals and digital
comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
Digital Comparator 5
Value Description
0 The trigger from digital comparator 5 is suppressed and cannot
generate a fault condition.
1 The trigger from digital comparator 5 is ORed with all other fault
condition generation inputs (Faultn signals and digital
comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
Digital Comparator 4
Value Description
0 The trigger from digital comparator 4 is suppressed and cannot
generate a fault condition.
1 The trigger from digital comparator 4 is ORed with all other fault
condition generation inputs (Faultn signals and digital
comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
Digital Comparator 3
Value Description
0 The trigger from digital comparator 3 is suppressed and cannot
generate a fault condition.
1 The trigger from digital comparator 3 is ORed with all other fault
condition generation inputs (Faultn signals and digital
comparators).
Note: The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
January 23, 2012
Texas Instruments-Production Data
1079