LM3S5G51 Datasheet, PDF (453/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Stellaris^® LM3S5G51 Microcontroller
Bit/Field
31:8
7:0
Name
reserved
PUE
Type
RO
R/W
Reset Description
0x0000.00 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
-
Pad Weak Pull-Up Enable
Value Description
1 The corresponding pin has a weak pull-up resistor.
0 The corresponding pin is not affected.
Setting a bit in the GPIOPDR register clears the corresponding bit in
the GPIOPUR register. The change is effective on the second clock
cycle after the write if accessing GPIO via the APB memory aperture.
If using AHB access, the change is effective on the next clock cycle.
The reset value for this register is 0x0000.0000 for GPIO ports that are
not listed in Table 9-1 on page 423.
January 23, 2012
453
Texas Instruments-Production Data