LM3S5G51 Datasheet, PDF (1116/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Signal Tables
Table 23-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PH7
I/O
TTL
GPIO port H bit 7.
15
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
SSI1Tx
O
TTL
SSI module 1 transmit.
PG3
I/O
TTL
GPIO port G bit 3.
Fault0
I
TTL
PWM Fault 0.
16
Fault2
I
TTL
PWM Fault 2.
I2S0RXMCLK
I/O
TTL
I²S module 0 receive master clock.
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
PG2
I/O
TTL
GPIO port G bit 2.
Fault0
I
TTL
PWM Fault 0.
17
I2S0RXSD
I/O
TTL
I²S module 0 receive data.
IDX1
I
TTL
QEI module 1 index.
PWM0
O
TTL
PWM 0. This signal is controlled by PWM Generator 0.
PG1
I2C1SDA
I/O
TTL
GPIO port G bit 1.
I/O
OD
I²C module 1 data.
18
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
U2Tx
O
TTL
UART module 2 transmit. When in IrDA mode, this signal has IrDA
modulation.
PG0
I2C1SCL
I/O
TTL
GPIO port G bit 0.
I/O
OD
I²C module 1 clock.
PWM0
O
TTL
PWM 0. This signal is controlled by PWM Generator 0.
19
PWM4
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
U2Rx
I
TTL
UART module 2 receive. When in IrDA mode, this signal has IrDA
modulation.
USB0EPEN
O
TTL
Optionally used in Host mode to control an external power source
to supply power to the USB bus.
20
VDD
-
Power Positive supply for I/O and some logic.
21
GND
-
Power Ground reference for logic and I/O pins.
PC7
I/O
TTL
GPIO port C bit 7.
C1o
O
TTL
Analog comparator 1 output.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
CCP4
I/O
TTL
Capture/Compare/PWM 4.
22
PhB0
I
TTL
QEI module 0 phase B.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
USB0PFLT
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
1116
Texas Instruments-Production Data
January 23, 2012