LM3S5G51 Datasheet, PDF (1168/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Signal Tables
Table 23-8. Signals by Signal Name (continued)
Pin Name
USB0PFLT
USB0RBIAS
Pin Number Pin Mux / Pin
Assignment
L2
PC7 (6)
M2
PC6 (7)
M6
PA7 (8)
E11
PB3 (8)
B11
PE0 (9)
B10
PH4 (4)
B6
PJ1 (9)
B12
fixed
Pin Type
I
O
USB0VBUS
D12
PB1
I/O
VBAT
L12
fixed
-
VDD
VDDA
K7
fixed
-
G12
K8
K9
H10
G10
E10
G11
C7
fixed
-
VDDC
VREFA
D3
fixed
-
C3
A7
PB6
I
WAKE
XOSC0
M10
fixed
I
K11
fixed
I
Buffer Type^a Description
TTL
Optionally used in Host mode by an external power
source to indicate an error state by that power
source.
Analog
Analog
Power
Power
9.1-kΩ resistor (1% precision) used internally for
USB analog circuitry.
This signal is used during the session request
protocol. This signal allows the USB PHY to both
sense the voltage level of VBUS, and pull up VBUS
momentarily during VBUS pulsing.
Power source for the Hibernation module. It is
normally connected to the positive terminal of a
battery and serves as the battery
backup/Hibernation module power-source supply.
Positive supply for I/O and some logic.
Power
Power
Analog
TTL
Analog
The positive supply for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in Table 25-2 on page 1186, regardless
of system implementation.
Positive supply for most of the logic function,
including the processor core and most peripherals.
The voltage on this pin is 1.3 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to the LDO pin and an external capacitor
as specified in Table 25-6 on page 1191.
This input provides a reference voltage used to
specify the input voltage at which the ADC converts
to a maximum value. In other words, the voltage
that is applied to VREFA is the voltage with which
an AINn signal is converted to 4095. The VREFA
input is limited to the range specified in Table
25-23 on page 1198 .
An external input that brings the processor out of
Hibernate mode when asserted.
Hibernation module oscillator crystal input or an
external clock reference input. Note that this is
either a 4.194304-MHz crystal or a 32.768-kHz
oscillator for the Hibernation module RTC. See the
CLKSEL bit in the HIBCTL register.
1168
Texas Instruments-Production Data
January 23, 2012