LM3S5G51 Datasheet, PDF (1021/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Stellaris^® LM3S5G51 Microcontroller
Figure 20-3 on page 1021 shows the behavior of the counter and the relationship of these pulses
when the counter is in Count-Down mode. Figure 20-4 on page 1022 shows the behavior of the counter
and the relationship of these pulses when the counter is in Count-Up/Down mode. In these figures,
the following definitions apply:
■ LOAD is the value in the PWMnLOAD register
■ COMPA is the value in the PWMnCMPA register
■ COMPB is the value in the PWMnCMPB register
■ 0 is the value zero
■ load is the internal signal that has a single-clock-cycle-width High pulse when the counter is
equal to the load value
■ zero is the internal signal that has a single-clock-cycle-width High pulse when the counter is zero
■ cmpA is the internal signal that has a single-clock-cycle-width High pulse when the counter is
equal to COMPA
■ cmpB is the internal signal that has a single-clock-cycle-width High pulse when the counter is
equal to COMPB
■ dir is the internal signal that indicates the count direction
Figure 20-3. PWM Count-Down Mode
LOAD
COMPA
COMPB
0
load
zero
cmpA
cmpB
dir
BDown
ADown
January 23, 2012
Texas Instruments-Production Data
1021