LM3S5G51 Datasheet, PDF (1041/1266 Pages) Texas Instruments – Stellaris® LM3S5G51 Microcontroller

Stellaris^® LM3S5G51 Microcontroller
Bit/Field
17
16
15:3
2
1
0
Name
INTFAULT1
INTFAULT0
reserved
INTPWM2
INTPWM1
INTPWM0
Type
RO
RO
RO
RO
RO
RO
Reset
0
0
0x000
0
0
0
Description
Interrupt Fault PWM 1
Value Description
1 The fault condition for PWM generator 1 is asserted.
0 The fault condition for PWM generator 1 has not been asserted.
This bit is cleared by writing a 1 to the INTFAULT1 bit in the PWMISC
register.
Interrupt Fault PWM 0
Value Description
1 The fault condition for PWM generator 0 is asserted.
0 The fault condition for PWM generator 0 has not been asserted.
This bit is cleared by writing a 1 to the INTFAULT0 bit in the PWMISC
register.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM2 Interrupt Asserted
Value Description
1 The PWM generator 2 block interrupt is asserted.
0 The PWM generator 2 block interrupt has not been asserted.
The PWM2RIS register shows the source of this interrupt. This bit is
cleared by writing a 1 to the corresponding bit in the PWM2ISC register.
PWM1 Interrupt Asserted
Value Description
1 The PWM generator 1 block interrupt is asserted.
0 The PWM generator 1 block interrupt has not been asserted.
The PWM1RIS register shows the source of this interrupt. This bit is
cleared by writing a 1 to the corresponding bit in the PWM1ISC register.
PWM0 Interrupt Asserted
Value Description
1 The PWM generator 0 block interrupt is asserted.
0 The PWM generator 0 block interrupt has not been asserted.
The PWM0RIS register shows the source of this interrupt. This bit is
cleared by writing a 1 to the corresponding bit in the PWM0ISC register.
January 23, 2012
Texas Instruments-Production Data
1041